This article presents the high-level synthesis of general multi-stage noise band cancellation (MSNBC) Σ∆ analog-to-digital converters (ADC). The MSNBC architecture allows to extend the conversion bandwidth of a primary modulator and to provide high resolution conversion. Moreover, this architecture should offer a low power consumption. This type of ADC is very use- ful for wideband and high resolution application such as the digitization of data for the linearization of base sta- tion (BTS) power amplifiers. This article introduces the MSNBC architecture and provides a methodology for the high-level design of such ADC for both discrete-time and continuous-time implementation. The methodology allows the design of stable and high resolution modu- lators and, allows the direct synthesis of digital filters used for noise cancellation. This methodology is fast and very useful to design high performance MSNBC Σ∆ ADC.