A Fast Reliability-aware Approach for Analogue Integrated Circuits based on Pareto Fronts

Hao Cai 1, 2 H. Petit 3, 2 J. F. Naviner 3, 2
1 SSH - Secure and Safe Hardware
LTCI - Laboratoire Traitement et Communication de l'Information
3 C2S - Circuits et Systèmes de Communication
LTCI - Laboratoire Traitement et Communication de l'Information
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https://hal.telecom-paristech.fr/hal-02286777
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Submitted on : Friday, September 13, 2019 - 4:10:20 PM
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  • HAL Id : hal-02286777, version 1

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Hao Cai, H. Petit, J. F. Naviner. A Fast Reliability-aware Approach for Analogue Integrated Circuits based on Pareto Fronts. IEEE International NEWCAS Conference, Jun 2013, Paris, France. ⟨hal-02286777⟩

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