Using FPGA self-produced transients to emulate SETs for SER estimation

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https://hal.telecom-paristech.fr/hal-02288530
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Submitted on : Saturday, September 14, 2019 - 6:55:16 PM
Last modification on : Monday, September 16, 2019 - 1:09:43 AM

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  • HAL Id : hal-02288530, version 1

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Fabio Batagin Armelin, Lirida Alves de Barros Naviner, Roberto d'Amore. Using FPGA self-produced transients to emulate SETs for SER estimation. Proceedings of IEEE Latin American Test Symposium (LATS), Mar 2018, São Paulo, SP, Brazil. ⟨hal-02288530⟩

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