Digital excess loop delay compensation for high speed delta–sigma modulators

Abstract :

A digital excess loop delay (ELD) compensation suited for high speed delta-sigma modulators is presented. Its operation is based on computing the digital outputs for all the possible values of the ELD compensation feedback and performing the selection in the digital domain. The proposed technique also uses a novel comparator sharing approach which minimises the number of comparators needed in the quantizer.

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https://hal.telecom-paristech.fr/hal-02292446
Contributor : Telecomparis Hal <>
Submitted on : Thursday, September 19, 2019 - 7:24:44 PM
Last modification on : Thursday, October 17, 2019 - 12:37:00 PM

Identifiers

  • HAL Id : hal-02292446, version 1

Citation

Chadi Jabbour, V. T. Nguyen, Srini Vason, Aggarwal Sudhir. Digital excess loop delay compensation for high speed delta–sigma modulators. IET Electronics Letters, 2015, 51 (15), pp.1155-1157. ⟨hal-02292446⟩

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