Physical architectures for packet-switching network nodes based on non-linear logic gates

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https://hal.telecom-paristech.fr/hal-02411803
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Submitted on : Sunday, December 15, 2019 - 12:19:01 PM
Last modification on : Thursday, December 19, 2019 - 1:11:05 AM

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H. Teimoori, D. Apostolopoulos, K. Vlachos, Cédric Ware, D. Petrantonakis, et al.. Physical architectures for packet-switching network nodes based on non-linear logic gates. 6th Symposium on Communication Systems, Networks and Digital Signal Processing, CSNDSP08, Aug 2008, Graz, Austria. ⟨hal-02411803⟩

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