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Design Methodology of an ASIC TRNG based on an open-loop delay chain

Molka Ben Romdhane 1, 2 Jean-Luc Danger 1, 2 Tarik Graba 1, 2 Yves Mathieu 1, 2
1 SSH - Secure and Safe Hardware
LTCI - Laboratoire Traitement et Communication de l'Information
Keywords : TRNG ASIC FPGA AIS-31
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Conference papers
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https://hal.telecom-paristech.fr/hal-02411986
Contributor : Telecomparis Hal <>
Submitted on : Sunday, December 15, 2019 - 12:40:31 PM
Last modification on : Wednesday, January 8, 2020 - 1:06:17 AM

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Molka Ben Romdhane, Jean-Luc Danger, Tarik Graba, Yves Mathieu. Design Methodology of an ASIC TRNG based on an open-loop delay chain. NEWCAS, Jun 2013, Paris, France. ⟨10.1109/NEWCAS.2013.6573654⟩. ⟨hal-02411986⟩

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